New, More Sensitive Transistors
Team: Professors Ali Javey, Tsu-Jae King Liu, Laura Waller, Eli Yablonovitch
Microchips (the “brains” of electronic systems) comprise transistors which function as electronic switches to process and store information encoded in the form of electric potentials, i.e. voltages. To reduce the power consumption of a microchip, smaller voltages must be used. However, conventional transistors require a control voltage signal at least a few hundred millivolts in magnitude to operate effectively as on/off switches. Therefore, alternative electronic switch designs (e.g. employing quantum-mechanical tunneling, internal control-voltage amplification, and/or physical actuation) and switches based on advanced materials are being investigated in the BETR Center, to enable very low operating voltages (below 100 millivolts) and thereby overcome this fundamental limitation for today’s microchips. This electronics research entails theoretical analyses and simulation-based studies to guide design optimization, advanced materials and process development, fabrication and characterization of new switch designs, and demonstration of low-voltage ICs.
Optical Interconnect and Electronic-Photonic Integration
Team: Professors Vladimir Stojanović, Ming Wu, Eli Yablonovitch
Silicon photonics has emerged as a promising solution to address the interconnect bottleneck in high performance computing (HPC) systems and data centers. Silicon photonics provides unprecedented I/O bandwidth, enabling ultrahigh aggregated bandwidth (~ 10 Tbps), high bandwidth density (~ Tbps/mm), and high energy efficiency (~ pJ/bit). BETR is pursuing cutting-edge researches in (1) direct integration of Si photonics in zero-change CMOS platforms, including both silicon-on-insulator (SOI) and bulk CMOS; (2) package-level electronic-photonic integration that will bring photonics much closer to central processing units (CPUs), graphical processing units (GPUs), switches, field-programmable gate arrays (FPGAs), and other high performance application-specific integrated circuits (ASICs); (3) sub-microsecond silicon photonic switches with high port count (240×240 demonstrated), low insertion loss and crosstalk, and broad spectral bandwidth (100nm); and (4) “photonic flow” in high performance computing systems integrating high-density silicon photonic interconnect and silicon photonic switches to achieve reconfigurable system on the fly (at runtime).
Team: Professors Ana Claudia Arias, Ali Javey, Vivek Subramanian
To become pervasive, electronic devices must be non-intrusive, easily deployed and inexpensive, even as they comprise an increasing variety of components for enhanced functionality. Research on flexible electronics under the BETR Center is guided by this immersive electronics vision to develop a new manufacturing and deployment paradigm for highly dispersed, interactive information devices. It entails the development of tools, processes and materials for roll-to-roll processing, layer transfer, high-resolution printing, and packaging. The cross-disciplinary nature of this research is exemplified in the development of nanoparticle inks for printed electronics, work which requires expertise in chemistry, fluid mechanics, materials science, and electrical engineering.
Team: Professors Jeffrey Bokor, Tsu-Jae King Liu, Sayeef Salahuddin
Large data sets coupled with long network latency result in significant energy inefficiencies in data centers. Processors consume energy mostly in the idle state, waiting for the network to return a data query or maintaining availability to service a remote query into local memory. Due to long latency, network fabrics also have low utilization, consuming much more power than that needed to move data around. Disaggregation of processing and memory resources and optimization of the network fabric, enabled by new memory technologies and silicon photonics, can provide for dramatically improved energy efficiency of warehouse-scale computers (WSCs).
In the BETR Center we are pursuing the goal of high-density non-volatile memory that can be monolithically integrated with CMOS circuitry, such as nanometer-scale magnetic and ferroelectric devices, and nano‐electro‐mechanical switches (NEMS) which can be implemented in an air‐gapped interconnect back‐end‐of‐line process. This research involves fundamental scientific studies, to elucidate physical phenomena such as electric-field control of magnetization in multiferroic-ferromagnet heterostructures (for voltage-controlled operation of nanomagnetic memory devices), as well as the development of integrated memory+logic fabrication processes and metrology for characterization of three-dimensionally integrated circuit structures.
Hardware Accelerators for Artificial Intelligence
Team: Professors Sayeef Salahuddin, Vladimir Stojanović, Eli Yablonovitch
The emergence of machine learning and other artificial intelligence applications has been accompanied by a growing need for new hardware architectures. The BETR center is investigating hardware accelerators specialized for the large-scale matrix computations used in deep neural networks, as well as new machines for solving difficult combinatorial optimization problems, such as those found in operations research, finance, and circuit design. The conventional von-Neumann computer is ill-suited for these applications in terms of latency and energy efficiency, due to its intrinsic architectural and algorithmic limitations, opening the door for alternative physical systems based on emerging technologies. We are investigating deep neural networks based on nanoelectromechanical relays and other novel switches, architecture-aware network pruning techniques, and analog machines that can solve NP-hard optimization problems without the need for the complexity of quantum bits.
Team: Professors Jeffrey Bokor, Tsu-Jae King Liu, Vladimir Stojanović
Future ICT applications set a broad context for research conducted in the BETR Center, which is complementary to other industry-sponsored centers such as the Berkeley Wireless Research Center (BWRC). Collaborative projects with BWRC researchers serve to bridge innovations in physical electronics together with innovations in IC design, for co-optimization of new solid-state device technologies and computer architectures. Through device modeling and simulation of integrated systems, tradeoffs between energy efficiency and performance can be optimized for applications ranging from Internet of Things to Warehouse-Scale Computers. In addition, as new device technologies reach sufficient maturity, testbeds will be designed and built to experimentally demonstrate their benefits for specific applications.