Accelerators for AI

Hardware Accelerators for Artificial Intelligence

Team: Tsu-Jae King Liu, Sayeef Salahuddin, Vladimir Stojanović, Laura Waller, Eli Yablonovitch

The emergence of machine learning and other artificial intelligence applications has been accompanied by a growing need for new hardware architectures. The BETR center is investigating hardware accelerators specialized for the large-scale matrix computations used in deep neural networks, as well as new machines for solving difficult combinatorial optimization problems, such as those found in operations research, finance, and circuit design. The conventional von-Neumann computer is ill-suited for these applications in terms of latency and energy efficiency, due to its intrinsic architectural and algorithmic limitations, opening the door for alternative physical systems based on emerging technologies. We are investigating deep neural networks based on nanoelectromechanical relays and other novel switches, architecture-aware network pruning techniques, and analog machines that can solve NP-hard optimization problems without the need for the complexity of quantum bits.